117 search results - page 21 / 24 » Architectural and technology influence on the optimal total ... |
DAC
1999
ACM
14 years 26 days ago
1999
ACM
As the CMOS technology enters the deep submicron design era, the lateral inter-wire coupling capacitance becomes the dominant part of load capacitance and makes RC delay on the bu...
GLVLSI
2009
IEEE
14 years 3 months ago
2009
IEEE
In the context of nanoscale networks-on-chip (NoCs), each link implementation solution is not just a specific synthesis optimization technique with local performance and power im...
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
DATE
2004
IEEE
14 years 8 days ago
2004
IEEE
Multimedia systems play a central part in many human activities. Due to the significant advances in the VLSI technology, there is an increasing demand for portable multimedia appl...
ARC
2008
Springer
13 years 10 months ago
2008
Springer
Over the last years, we have witnessed the increased use of Application-Specific Instruction-Set Processors (ASIPs). These ASIPs are processors that have a customizable instruction...