Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network a...
Jia Yu, Jingnan Yao, Jun Yang 0002, Laxmi N. Bhuya...
The RAMpage hierarchy moves main memory up a level to replace the lowest-level cache by an equivalent-sized SRAM main memory. This paper is a first look at the value of RAMpage to ...
In this paper we present an hardware implementation of the RSA algorithm for public-key cryptography. The RSA algorithm consists in the computation of modular exponentials on larg...
Antonino Mazzeo, Luigi Romano, Giacinto Paolo Sagg...
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
Design space exploration during high level synthesis is often conducted through ad-hoc probing of the solution space using some scheduling algorithm. This is not only time consumi...
Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastne...