1381 search results - page 34 / 277 » Architecture and Design of a High Performance SRAM for SOC D... |
HPDC
2000
IEEE
14 years 14 days ago
2000
IEEE
We describe a software architecture for storage services in computational grid environments. Based upon a lightweight message-passing paradigm, the architecture enables the provis...
DAC
2007
ACM
14 years 9 months ago
2007
ACM
Negative bias temperature instability (NBTI) in MOSFETs is one of the major reliability challenges in nano-scale technology. This paper presents an efficient technique to characte...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...
DAC
2002
ACM
14 years 9 months ago
2002
ACM
The next generation of computer chips will continue the trend for more complexity than their predecessors. Many of them will contain different chip technologies and are termed SoC...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...