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VLSID
2002
IEEE
92views VLSI» more  VLSID 2002»
14 years 8 months ago
Electromigration Avoidance in Analog Circuits: Two Methodologies for Current-Driven Routing
Interconnect with an insufficient width may be subject to electromigration and eventually cause the failure of the circuit at any time during its lifetime. This problem has gotten...
Jens Lienig, Goeran Jerke, Thorsten Adler
ICCAD
1995
IEEE
106views Hardware» more  ICCAD 1995»
13 years 11 months ago
Re-engineering of timing constrained placements for regular architectures
In a typical design ow, the design may be altered slightly several times after the initial design cycle according to minor changes in the design speci cation either as a result o...
Anmol Mathur, K. C. Chen, C. L. Liu
DAC
2001
ACM
14 years 8 months ago
Performance-Driven Multi-Level Clustering with Application to Hierarchical FPGA Mapping
In this paper, we study the problem of performance-driven multi-level circuit clustering with application to hierarchical FPGA designs. We first show that the performance-driven m...
Jason Cong, Michail Romesis
FPGA
2001
ACM
152views FPGA» more  FPGA 2001»
14 years 8 days ago
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
Jörg Ritter, Paul Molitor
ICCAD
1999
IEEE
89views Hardware» more  ICCAD 1999»
14 years 3 days ago
A bipartition-codec architecture to reduce power in pipelined circuits
This paper proposes a new bipatition-codec architecture that may reduce power consumption of pipelined circuits. We treat each output value of a pipelined circuit as one state of ...
Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Shyh-J...