34 search results - page 5 / 7 » Asynchronous Architectures for Nanometer Scales |
ISLPED
2004
ACM
14 years 25 days ago
2004
ACM
As clock frequency and die area increase, achieving energy efficiency, while distributing a low skew, global clock signal becomes increasingly difficult. Challenges imposed by dee...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
ISCA
2010
IEEE
14 years 14 days ago
2010
IEEE
Aggressive technology scaling into the nanometer regime has led to a host of reliability challenges in the last several years. Unlike onchip caches, which can be efficiently prot...
ASPLOS
1998
ACM
13 years 11 months ago
1998
ACM
This paper describes the Network-Attached Secure Disk (NASD) storage architecture, prototype implementations of NASD drives, array management for our architecture, and three files...