30 search results - page 3 / 6 » Automated Mapping of Coarse-Grain Pipelined Applications to ... |
ASPDAC
2012
ACM
12 years 4 months ago
2012
ACM
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
DAC
2001
ACM
14 years 9 months ago
2001
ACM
In this paper, we study the problem of performance-driven multi-level circuit clustering with application to hierarchical FPGA designs. We first show that the performance-driven m...
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
FPGA
2007
ACM
14 years 2 months ago
2007
ACM
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
FPL
2007
Springer
14 years 2 months ago
2007
Springer
Multiprocessor systems-on-chip (MPSoC) are being developed in increasing numbers to support the high number of applications running on modern embedded systems. Designing and progr...