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127
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DATE
2004
IEEE
126views Hardware» more  DATE 2004»
15 years 7 months ago
GRAAL - A Development Framework for Embedded Graphics Accelerators
This paper presents a versatile hardware/software cosimulation and co-design environment for embedded 3D graphics accelerators. The GRAphics AcceLerator design exploration framewo...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
103
Voted
SIGCSE
2008
ACM
92views Education» more  SIGCSE 2008»
15 years 3 months ago
Patterns for programming in parallel, pedagogically
Pipeline, Delta, and Black Hole are three simple patterns used in concurrent software design. We recently presented these and other patterns for parallelism at a nine-hour worksho...
Matthew C. Jadud, Jon Simpson, Christian L. Jacobs...
112
Voted
ICCAD
2002
IEEE
146views Hardware» more  ICCAD 2002»
16 years 12 days ago
Test-model based hierarchical DFT synthesis
With increasing design sizes and adoption of System on a Chip (SoC) methodology, design synthesis and test automation tools are hitting capacity and performance bottlenecks. Curre...
Sanjay Ramnath, Frederic Neuveux, Mokhtar Hirech, ...
154
Voted
JOT
2006
107views more  JOT 2006»
15 years 3 months ago
Object-Oriented Design Patterns for Detailed Design
This paper discusses the use of design patterns during the transition phase from analysis to design of object-oriented systems. Pattern mining, which is the process of finding and...
W. Al-Ahmad
102
Voted
IROS
2009
IEEE
146views Robotics» more  IROS 2009»
15 years 10 months ago
Enhancing an automated Braille Writing Tutor
— The reported work advances the state-of-the-art in assistive technology for the blind by enhancing a low-cost automated tutor designed to teach braille writing skills to visual...
Mohammed Kaleemur Rahman, Saurabh Sanghvi, Noura E...