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» Automatic Generation of Complex Properties for Hardware Desi...
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117
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ASAP
2003
IEEE
153views Hardware» more  ASAP 2003»
15 years 9 months ago
Hardware Synthesis for Multi-Dimensional Time
This paper introduces basic principles for extending the classical systolic synthesis methodology to multi-dimensional time. Multi-dimensional scheduling enables complex algorithm...
Anne-Claire Guillou, Patrice Quinton, Tanguy Risse...
126
Voted
DATE
2008
IEEE
121views Hardware» more  DATE 2008»
15 years 10 months ago
Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures
As levels of parallelism are becoming increasingly complex in multiprocessor architectures, GALS, and asynchronous circuits, methodologies and software tools are needed to verify ...
Nicolas Coste, Hubert Garavel, Holger Hermanns, Ri...
179
Voted
IFIPPACT
1994
15 years 5 months ago
Microcode Generation for Flexible Parallel Target Architectures
: Advanced architectural features of microprocessors like instruction level parallelism and pipelined functional hardware units require code generation techniques beyond the scope ...
Rainer Leupers, Wolfgang Schenk, Peter Marwedel
127
Voted
DAC
1999
ACM
16 years 4 months ago
Robust FPGA Intellectual Property Protection Through Multiple Small Watermarks
A number of researchers have proposed using digital marks to provide ownership identification for intellectual property. Many of these techniques share three specific weaknesses: ...
John Lach, William H. Mangione-Smith, Miodrag Potk...
128
Voted
BMCBI
2008
145views more  BMCBI 2008»
15 years 3 months ago
The contrasting properties of conservation and correlated phylogeny in protein functional residue prediction
Background: Amino acids responsible for structure, core function or specificity may be inferred from multiple protein sequence alignments where a limited set of residue types are ...
Jonathan R. Manning, Emily R. Jefferson, Geoffrey ...