Sciweavers

437 search results - page 72 / 88
» Automatic Generation of Implied Constraints
Sort
View
SCA
2007
13 years 9 months ago
Face poser: interactive modeling of 3D facial expressions using model priors
In this paper, we present an intuitive interface for interactively posing 3D facial expressions. The user can create and edit facial expressions by drawing freeform strokes, or by...
Manfred Lau, Jinxiang Chai, Ying-Qing Xu, Heung-Ye...
DAC
2003
ACM
14 years 8 months ago
A scalable software-based self-test methodology for programmable processors
Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) th...
Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit D...
AAAI
1998
13 years 8 months ago
An Expert System for Alarm System Planning
This paper discusses the design and implementation of ESSPL, an expert system which generates security plans for alarm systems (Figure 1). Security planning is the task of determi...
Akira Tsurushima, Kenji Urushima, Daigo Sakata, Hi...
ASPDAC
2012
ACM
334views Hardware» more  ASPDAC 2012»
12 years 3 months ago
GreenDroid: An architecture for the Dark Silicon Age
— The Dark Silicon Age kicked off with the transition to multicore and will be characterized by a wild chase for seemingly ever-more insane architectural designs. At the heart o...
Nathan Goulding-Hotta, Jack Sampson, Qiaoshi Zheng...
DAC
2008
ACM
14 years 8 months ago
DVFS in loop accelerators using BLADES
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-t...
Ganesh S. Dasika, Shidhartha Das, Kevin Fan, Scott...