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TVLSI
2010
13 years 1 months ago
Area and Power Optimization of High-Order Gain Calibration in Digitally-Enhanced Pipelined ADCs
Digital calibration techniques are widely utilized to linearize pipelined analog-to-digital converters (ADCs). However, their power dissipation can be prohibitively high, particula...
Mohammad Taherzadeh-Sani, Anas A. Hamoui
ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
13 years 11 months ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha
FDL
2005
IEEE
14 years 10 days ago
Automatic synthesis of the Hardware/Software Interface
Although Moore’s Law enables a huge number of components to be integrated into a single chip, design methods that will allow system architects to put the components together to ...
Francesco Regazzoni, André C. Nácul,...
ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
13 years 11 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
DAC
2002
ACM
14 years 7 months ago
Software synthesis from synchronous specifications using logic simulation techniques
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
Yunjian Jiang, Robert K. Brayton