Sciweavers

89 search results - page 13 / 18
» Automating custom-precision function evaluation for embedded...
Sort
View
CODES
2005
IEEE
14 years 10 days ago
Designing real-time H.264 decoders with dataflow architectures
High performance microprocessors are designed with generalpurpose applications in mind. When it comes to embedded applications, these architectures typically perform controlintens...
Youngsoo Kim, Suleyman Sair
DAC
2002
ACM
14 years 7 months ago
An integer linear programming based approach for parallelizing applications in On-chip multiprocessors
With energy consumption becoming one of the first-class optimization parameters in computer system design, compilation techniques that consider performance and energy simultaneous...
Ismail Kadayif, Mahmut T. Kandemir, Ugur Sezer
EH
2004
IEEE
117views Hardware» more  EH 2004»
13 years 10 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
13 years 11 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
DATE
2009
IEEE
149views Hardware» more  DATE 2009»
14 years 1 months ago
An ILP formulation for task mapping and scheduling on multi-core architectures
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tugh...