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GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
14 years 3 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
SIGGRAPH
1996
ACM
14 years 2 months ago
Hierarchical Image Caching for Accelerated Walkthroughs of Complex Environments
We present a new method that utilizes path coherence to accelerate walkthroughs of geometrically complex static scenes. As a preprocessing step, our method constructs a BSP-tree t...
Jonathan Shade, Dani Lischinski, David Salesin, To...
CF
2007
ACM
14 years 1 months ago
An analysis of the effects of miss clustering on the cost of a cache miss
In this paper we describe a new technique, called pipeline spectroscopy, and use it to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogra...
Thomas R. Puzak, Allan Hartstein, Philip G. Emma, ...
ESA
2008
Springer
159views Algorithms» more  ESA 2008»
13 years 11 months ago
Cache-Oblivious Red-Blue Line Segment Intersection
We present an optimal cache-oblivious algorithm for finding all intersections between a set of non-intersecting red segments and a set of non-intersecting blue segments in the plan...
Lars Arge, Thomas Mølhave, Norbert Zeh
ASPLOS
2008
ACM
13 years 12 months ago
Predictor virtualization
Many hardware optimizations rely on collecting information about program behavior at runtime. This information is stored in lookup tables. To be accurate and effective, these opti...
Ioana Burcea, Stephen Somogyi, Andreas Moshovos, B...