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ASPDAC
2006
ACM
110views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Switching-activity driven gate sizing and Vth assignment for low power design
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...
Yu-Hui Huang, Po-Yuan Chen, TingTing Hwang
HM
2009
Springer
145views Optimization» more  HM 2009»
14 years 1 months ago
A Hybrid Solver for Large Neighborhood Search: Mixing Gecode and EasyLocal + +
We present a hybrid solver (called GELATO) that exploits the potentiality of a Constraint Programming (CP) environment (Gecode) and of a Local Search (LS) framework (EasyLocal++ )....
Raffaele Cipriano, Luca Di Gaspero, Agostino Dovie...
NETCOOP
2009
Springer
14 years 3 months ago
Optimal File Splitting for Wireless Networks with Concurrent Access
The fundamental limits on channel capacity form a barrier to the sustained growth on the use of wireless networks. To cope with this, multi-path communication solutions provide a p...
Gerard Hoekstra, Rob van der Mei, Yoni Nazarathy, ...
GECCO
2005
Springer
148views Optimization» more  GECCO 2005»
14 years 2 months ago
Multiobjective VLSI cell placement using distributed genetic algorithm
Genetic Algorithms have worked fairly well for the VLSI cell placement problem, albeit with significant run times. Two parallel models for GA are presented for VLSI cell placemen...
Sadiq M. Sait, Mohammed Faheemuddin, Mahmood R. Mi...
VLSID
2002
IEEE
151views VLSI» more  VLSID 2002»
14 years 9 months ago
Mode Selection and Mode-Dependency Modeling for Power-Aware Embedded Systems
Among the many techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model at the same time. S...
Dexin Li, Pai H. Chou, Nader Bagherzadeh