1242 search results - page 47 / 249 » Benchmark Analysis with FaCT |
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
| This paper reports the design of BIST structures for sequential machines. Testability of an FSM is limited due to the fact that some machine states remain unreachable and some ac...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
Consideration of pairs of transition in probabilistic simulation allows power estimation for digital circuits in which inertial delays can filter glitches [5]. However, the merit ...
DSD
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents a methodology for accurately characterizing the system calls of an operating system for embedded applications. Characterization consists of two phases: measure...
ISQED
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents a statistic-based approach for evaluating the testability of nodes in combinational circuits. This testability measurement is obtained via Monte Carlo simulati...
ISQED
2007
IEEE
14 years 1 months ago
2007
IEEE
Design verification has become a bottleneck of modern designs. Recently, simulation-based random verification has attracted a lot of interests due to its effectiveness in uncoveri...