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» Benchmarking and hardware implementation of JPEG-LS
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ACMMSP
2006
ACM
252views Hardware» more  ACMMSP 2006»
14 years 3 months ago
Deconstructing process isolation
Most operating systems enforce process isolation through hardware protection mechanisms such as memory segmentation, page mapping, and differentiated user and kernel instructions....
Mark Aiken, Manuel Fähndrich, Chris Hawblitze...
ICCD
2005
IEEE
109views Hardware» more  ICCD 2005»
14 years 6 months ago
VALVE: Variable Length Value Encoder for Off-Chip Data Buses.
We propose VAriable Length Value Encoding (VALVE) technique to reduce the power consumption in the off-chip data buses. While past research has focused on encoding fixed length da...
Dinesh C. Suresh, Banit Agrawal, Walid A. Najjar, ...
ISLPED
2004
ACM
124views Hardware» more  ISLPED 2004»
14 years 3 months ago
The design of a low power asynchronous multiplier
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of low po...
Yijun Liu, Stephen B. Furber
DATE
2003
IEEE
141views Hardware» more  DATE 2003»
14 years 2 months ago
On-chip Stack Based Memory Organization for Low Power Embedded Architectures
This paper presents a on-chip stack based memory organization that effectively reduces the energy dissipation in programmable embedded system architectures. Most embedded systems ...
Mahesh Mamidipaka, Nikil D. Dutt
ISCAS
2002
IEEE
125views Hardware» more  ISCAS 2002»
14 years 2 months ago
Switching activity estimation of finite state machines for low power synthesis
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
Mikael Kerttu, Per Lindgren, Mitchell A. Thornton,...