Sciweavers

613 search results - page 15 / 123
» Block cache for embedded systems
Sort
View
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
14 years 2 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah
CASES
2007
ACM
14 years 18 days ago
A low power front-end for embedded processors using a block-aware instruction set
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...
Ahmad Zmily, Christos Kozyrakis
ECRTS
2009
IEEE
13 years 6 months ago
Using Randomized Caches in Probabilistic Real-Time Systems
While hardware caches are generally effective at improving application performance, they greatly complicate performance prediction. Slight changes in memory layout or data access p...
Eduardo Quiñones, Emery D. Berger, Guillem ...
DATE
2006
IEEE
93views Hardware» more  DATE 2006»
14 years 2 months ago
Restructuring field layouts for embedded memory systems
In many computer systems with large data computations, the delay of memory access is one of the major performance bottlenecks. In this paper, we propose an enhanced field remappi...
Keoncheol Shin, Jungeun Kim, Seonggun Kim, Hwansoo...
IPPS
1998
IEEE
14 years 26 days ago
Thermal Management in Embedded Systems Using MEMS
Jeffrey T. Draper, Jay Block, Jeff Koller, Craig S...