613 search results - page 32 / 123 » Block cache for embedded systems |
HPCC
2009
Springer
14 years 1 months ago
2009
Springer
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
We propose two novel integration techniques -- bypass and bookkeeping -- in the memory controller to address the cache coherence compatibility issue of a non-shared bus heterogene...
JSA
2008
13 years 8 months ago
2008
Architectural advancements in modern processor designs increase average performance with features such as pipelines, caches, branch prediction, and out-of-order execution. However...
CODES
2007
IEEE
14 years 3 months ago
2007
IEEE
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
GLVLSI
2010
IEEE
13 years 10 months ago
2010
IEEE
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...