The increasing popularity of SAT and BDD techniques in verification and synthesis encourages the search for additional speed-ups. Since typical SAT and BDD algorithms are exponent...
This paper describes an algorithm for the efficient solution of large systems of Boolean equations. The algorithm exploits the fact that, in some cases, the composition operation ...
A special logic synthesis problem is considered for Boolean functions which have large don’t care sets and are irregular. Here, a function is considered as irregular if the inpu...
Valentin Gherman, Hans-Joachim Wunderlich, R. D. M...
Inthispaperweintroduceanondeterministiccounterpart to Reduced, Ordered Binary Decision Diagrams for the representation and manipulation of logic functions. ROBDDs are conceptually...
Reduced Ordered Binary Decision Diagrams (BDDs) are a data structure for representation and manipulation of Boolean functions which are frequently used in VLSI Design Automation. ...