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DAC
1996
ACM
14 years 18 days ago
Symphony: A Simulation Backplane for Parallel Mixed-Mode Co-Simulation of VLSI Systems
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation ...
Antonio R. W. Todesco, Teresa H. Y. Meng
CSREAESA
2004
13 years 9 months ago
CMOS Implementation of Phase-Encoded Complex-Valued Artificial Neural Networks
- The model of a simple perceptron using phase-encoded inputs and complex-valued weights is presented. Multilayer two-input and three-input complex-valued neurons (CVNs) are implem...
Howard E. Michel, David Rancour, Sushanth Iringent...
FPGA
2008
ACM
168views FPGA» more  FPGA 2008»
13 years 9 months ago
Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs
The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an ...
Alessandro Cevrero, Panagiotis Athanasopoulos, Had...
DATE
2006
IEEE
94views Hardware» more  DATE 2006»
14 years 2 months ago
Large power grid analysis using domain decomposition
: This paper presents a domain decomposition (DD) technique for efficient simulation of large-scale linear circuits such as power distribution networks. Simulation results show th...
Quming Zhou, Kai Sun, Kartik Mohanram, Danny C. So...
ITC
2003
IEEE
108views Hardware» more  ITC 2003»
14 years 1 months ago
Backplane Test Bus Applications For IEEE STD 1149.1
Prior to the mid 1980s, the dominance of through-hole packaging of integrated circuits (ICs) provided easy access to nearly every pin of every chip on a printed circuit board. Pro...
Clayton Gibbs