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CVPR
2007
IEEE
14 years 9 months ago
Integrating Global and Local Structures: A Least Squares Framework for Dimensionality Reduction
Linear Discriminant Analysis (LDA) is a popular statistical approach for dimensionality reduction. LDA captures the global geometric structure of the data by simultaneously maximi...
Jianhui Chen, Jieping Ye, Qi Li
ADMA
2008
Springer
124views Data Mining» more  ADMA 2008»
13 years 9 months ago
Dimensionality Reduction for Classification
We investigate the effects of dimensionality reduction using different techniques and different dimensions on six two-class data sets with numerical attributes as pre-processing fo...
Frank Plastria, Steven De Bruyne, Emilio Carrizosa
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 4 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
IJON
2010
121views more  IJON 2010»
13 years 4 months ago
Sample-dependent graph construction with application to dimensionality reduction
Graph construction plays a key role on learning algorithms based on graph Laplacian. However, the traditional graph construction approaches of -neighborhood and k-nearest-neighbor...
Bo Yang, Songcan Chen
DATE
2007
IEEE
86views Hardware» more  DATE 2007»
14 years 1 months ago
Reduction of detected acceptable faults for yield improvement via error-tolerance
Error-tolerance is an innovative way to enhance the effective yield of IC products. Previously a test methodology based on error-rate estimation to support error-tolerance was pro...
Tong-Yu Hsieh, Kuen-Jong Lee, Melvin A. Breuer