416 search results - page 69 / 84 » CMOL FPGA circuits |
CODES
2005
IEEE
14 years 3 months ago
2005
IEEE
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
DAC
2005
ACM
14 years 10 months ago
2005
ACM
MiniBit, our automated approach for optimizing bit-widths of fixed-point designs is based on static analysis via affine arithmetic. We describe methods to minimize both the intege...
DATE
2005
IEEE
14 years 3 months ago
2005
IEEE
Triple Modular Redundancy (TMR) is a suitable fault tolerant technique for SRAM-based FPGA. However, one of the main challenges in achieving 100% robustness in designs protected b...
IPPS
2005
IEEE
14 years 3 months ago
2005
IEEE
Modern internet and telephone switches consist of numerous VLSI-circuits operating at high frequencies to handle high bandwidths. It is beyond question that such systems must cont...
ISPAN
2005
IEEE
14 years 3 months ago
2005
IEEE
Within the parallel computing domain, field programmable gate arrays (FPGA) are no longer restricted to their traditional role as substitutes for application-specific integrated...