869 search results - page 142 / 174 » Cache Architectures for Reconfigurable Hardware |
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Partitioning a memory into multiple blocks that can be independently accessed is a widely used technique to reduce its dynamic power. For embedded systems, its benefits can be ev...
ISCA
2000
IEEE
13 years 12 months ago
2000
IEEE
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
MICRO
2000
IEEE
13 years 7 months ago
2000
IEEE
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
FPL
2007
Springer
14 years 1 months ago
2007
Springer
Programmable logic cores (PLCs) offer a means of providing post-fabrication re-configurability to a SoC design. Circuits implemented in a PLC will inevitably have lower timing per...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
As wireless platforms converge to multimedia systems, architectures must converge to support voice, data, and video applications. From a processor architecture perspective, suppor...