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172
Voted
ISLPED
1998
ACM
15 years 10 months ago
1998
ACM
CT This paper investigates the low power implementation issues of the soft-output Viterbi algorithm (SOVA), a building block for turbo codes. By briefly explaining the theory of t...
177
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SASP
2009
IEEE
16 years 28 days ago
2009
IEEE
— In this paper, we present Parade, a novel and flexible parallel architecture for the deinterleaving of combined pulsetrains. This is a commonly performed task in various areas ...
131
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DATE
2007
IEEE
16 years 16 days ago
2007
IEEE
In this paper we propose a hardware real time operating system (HW-RTOS) that implements the OS layer in a dual-processor SMP architecture. Intertask communication is specified b...
158
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IROS
2007
IEEE
16 years 15 days ago
2007
IEEE
— Complex, autonomous robots integrate a large set of sometimes very diverse algorithms across at least three levels of system organization: the agent architecture, the implement...
187
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ISCC
2007
IEEE
16 years 15 days ago
2007
IEEE
One of the difficulties of optical packet switched networks is buffering optical packets in the network. Currently, one solution that can be used for buffering in the optical dom...