658 search results - page 84 / 132 » Challenges in Physical Chip Design |
ISCA
2000
IEEE
14 years 1 months ago
2000
IEEE
While architects understandhow to build cost-effective parallel machines across a wide spectrum of machine sizes (ranging from within a single chip to large-scale servers), the re...
DSD
2004
IEEE
14 years 17 days ago
2004
IEEE
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
—As semiconductor manufacturing enters advanced nanometer design paradigm, aging and device wear-out related degradation is becoming a major concern. Negative Bias Temperature In...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
— The world of 3D graphics, until recently restricted to high-end workstations and game consoles, is rapidly expanding into the domain of mobile platforms such as cellular phones...
ASPLOS
2004
ACM
14 years 2 months ago
2004
ACM
Power density in high-performance processors continues to increase with technology generations as scaling of current, clock speed, and device density outpaces the downscaling of s...