Sciweavers

253 search results - page 13 / 51
» Circuit partitions and
Sort
View
DATE
1998
IEEE
93views Hardware» more  DATE 1998»
14 years 1 days ago
Exact and Approximate Estimation for Maximum Instantaneous Current of CMOS Circuits
We present an integer-linear-programming-based approach for estimating the maximum instantaneous current through the power supply lines for CMOS circuits. It produces the exact so...
Yi-Min Jiang, Kwang-Ting Cheng
VLSID
2003
IEEE
167views VLSI» more  VLSID 2003»
14 years 8 months ago
Timing Minimization by Statistical Timing hMetis-based Partitioning
In this paper we present statistical timing driven hMetisbased partitioning. We approach timing driven partitioning from a different perspective: we use the statistical timing cri...
Cristinel Ababei, Kia Bazargan
ISPD
1998
ACM
187views Hardware» more  ISPD 1998»
14 years 20 hour ago
The ISPD98 circuit benchmark suite
From 1985-1993, the MCNC regularly introduced and maintained circuit benchmarks for use by the Design Automation community. However, during the last five years, no new circuits h...
Charles J. Alpert
DATE
2005
IEEE
153views Hardware» more  DATE 2005»
14 years 1 months ago
Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices
Soft errors are an increasingly serious problem for logic circuits. To estimate the effects of soft errors on such circuits, we develop a general computational framework based on ...
Smita Krishnaswamy, George F. Viamontes, Igor L. M...
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
14 years 2 days ago
Timing-driven partitioning for two-phase domino and mixed static/domino implementations
Domino logic is a high-performance circuit configuration that is usually embedded in static logic environment and tightly coupled with the clocking scheme. In this paper, the timi...
Min Zhao, Sachin S. Sapatnekar