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WORDS
2003
IEEE
14 years 1 months ago
Foucault's Pendulum in the Distributed Control Lab
The ’Distributed Control Lab’ [6] at Hasso-PlattnerInstitute, University of Potsdam allows experimentation with a variety of physical equipment via the web (intra and internet...
Andreas Rasche, Peter Tröger, Michael Dirska,...
DATE
2010
IEEE
113views Hardware» more  DATE 2010»
14 years 1 months ago
PM-COSYN: PE and memory co-synthesis for MPSoCs
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
Yi-Jung Chen, Chia-Lin Yang, Po-Han Wang
ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
14 years 1 months ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
ISCC
2002
IEEE
120views Communications» more  ISCC 2002»
14 years 1 months ago
UMTS-TDD: a solution for internetworking Bluetooth piconets in indoor environments
–– The last few years have seen the evolution of telecommunications from the classic architectures, mainly based on static and wired structures, to the new mobile solutions bas...
Mario Gerla, Yeng-Zhong Lee, Rohit Kapoor, Ted Tae...
DAC
2003
ACM
14 years 9 months ago
Automated synthesis of efficient binary decoders for retargetable software toolkits
A binary decoder is a common component of software development tools such as instruction set simulators, disassemblers and debuggers. The efficiency of the decoder can have a sign...
Wei Qin, Sharad Malik