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DAC
2008
ACM
14 years 9 months ago
Transistor level gate modeling for accurate and fast timing, noise, and power analysis
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
S. Raja, F. Varadi, Murat R. Becer, Joao Geada
DAC
2007
ACM
14 years 9 months ago
A New Twisted Differential Line Structure in Global Bus Design
Twisted differential line structure can effectively reduce crosstalk noise on global bus, which foresees a wide applicability. However, measured performance based on fabricated ci...
Zhanyuan Jiang, Shiyan Hu, Weiping Shi
DAC
2001
ACM
14 years 9 months ago
A True Single-Phase 8-bit Adiabatic Multiplier
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...
DAC
2002
ACM
14 years 9 months ago
Combined BEM/FEM substrate resistance modeling
For present-day micro-electronic designs, it is becoming ever more important to accurately model substrate coupling effects. Basically, either a Finite Element Method (FEM) or a B...
Eelco Schrik, N. P. van der Meijs
DAC
2005
ACM
14 years 9 months ago
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Denni...