197 search results - page 18 / 40 » Circuits, Pebbling and Expressibility |
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
DIMACS
1996
13 years 8 months ago
1996
in Structure'95. 14] R. Fagin. Easier ways to win logical games. In Proc. DIMACS Workshop on Descriptive Complexity and Finite Models, AMS 1997. 15] R. Fagin, L. Stockmeyer, M...
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
In this paper, we propose a new representation of VLSI floorplan and building block problem. The representation is the generalization of Polish expression [1]. By proposing a new ...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Negative bias temperature instability (NBTI) in MOSFETs is one of the major reliability challenges in nano-scale technology. This paper presents an efficient technique to characte...