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» Clock Distribution Design in VLSI Circuits. An Overview
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ISCAS
2006
IEEE
122views Hardware» more  ISCAS 2006»
14 years 1 months ago
256-channel integrated neural interface and spatio-temporal signal processor
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...
J. N. Y. Aziz, Roman Genov, B. R. Bardakjian, M. D...
DAC
2002
ACM
14 years 8 months ago
ILP-based engineering change
We have developed a generic integer linear programming(ILP)based engineering change(EC) methodology. The EC methodology has three components: enabling, fast, and preserving. Enabl...
Farinaz Koushanfar, Jennifer L. Wong, Jessica Feng...
IPSN
2007
Springer
14 years 1 months ago
A platform for ubiquitous sensor deployment in occupational and domestic environments
In this paper, we introduce the “Plug” sensor network, a ubiquitous networked sensing platform ideally suited to broad deployment in environments where people work and live. T...
Joshua Lifton, Mark Feldmeier, Yasuhiro Ono, Camer...
CASES
2006
ACM
13 years 11 months ago
Probabilistic arithmetic and energy efficient embedded signal processing
Probabilistic arithmetic, where the ith output bit of addition and multiplication is correct with a probability pi, is shown to be a vehicle for realizing extremely energy-efficie...
Jason George, B. Marr, Bilge E. S. Akgul, Krishna ...
ICCAD
2003
IEEE
148views Hardware» more  ICCAD 2003»
14 years 4 months ago
Multi.Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization
In this paper we present a family of multi-objective hypergraph partitioning algorithms based on the multilevel paradigm, which are capable of producing solutions in which both th...
Navaratnasothie Selvakkumaran, George Karypis