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» Collaborative Routing Architecture for FPGA
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ICCAD
2001
IEEE
103views Hardware» more  ICCAD 2001»
14 years 5 months ago
Interconnect Resource-Aware Placement for Hierarchical FPGAs
In this paper, we utilize Rent’s rule as an empirical measure for efficient clustering and placement of circuits on hierarchical FPGAs. We show that careful matching of design c...
Amit Singh, Ganapathy Parthasarathy, Malgorzata Ma...
WETICE
1998
IEEE
14 years 26 days ago
An Open Architecture for Supporting Collaboration on the Web
The MEMOIR framework supports researchers working with a vast quantity of distributed information, by assisting them in finding both relevant documents and researchers with relate...
David De Roure, Wendy Hall, Siegfried Reich, Aggel...
DAC
2006
ACM
14 years 9 months ago
Optimal simultaneous mapping and clustering for FPGA delay optimization
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
Joey Y. Lin, Deming Chen, Jason Cong
FPGA
2003
ACM
156views FPGA» more  FPGA 2003»
14 years 1 months ago
Architectures and algorithms for synthesizable embedded programmable logic cores
As integrated circuits become more and more complex, the ability to make post-fabrication changes will become more and more attractive. This ability can be realized using programm...
Noha Kafafi, Kimberly Bozman, Steven J. E. Wilton
ANCS
2005
ACM
14 years 2 months ago
A novel reconfigurable hardware architecture for IP address lookup
IP address lookup is one of the most challenging problems of Internet routers. In this paper, an IP lookup rate of 263 Mlps (Million lookups per second) is achieved using a novel ...
Hamid Fadishei, Morteza Saheb Zamani, Masoud Sabae...