315 search results - page 4 / 63 » Combinational Verification based on High-Level Functional Sp... |
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
The continuous improvement on the design methodologies and processes has made possible the creation of huge and very complex digital systems. Design verification is one of the mai...
FDL
2003
IEEE
14 years 1 months ago
2003
IEEE
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
We propose a new approach to accelerate transaction level verification by raising the productivity of the verification suites including test patterns, protocol checker, and simula...
DAC
1996
ACM
13 years 12 months ago
1996
ACM
- Functional verification of the new generation microprocessor developed by SGS-THOMSON Microelectronics makes extensive use of advanced technologies. This paper presents a global ...
B
2007
Springer
13 years 12 months ago
2007
Springer
Abstract. A recent contribution to the formal specification and verification of concurrent systems is the integration of the state- and event-based approaches B and CSP, specifical...