315 search results - page 6 / 63 » Combinational Verification based on High-Level Functional Sp... |
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
DSD
2004
IEEE
13 years 11 months ago
2004
IEEE
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
SERA
2004
Springer
14 years 1 months ago
2004
Springer
NuEditor is a tool suite supporting specification and verification of software requirements written in NuSCR. NuSCR extends SCR (Software Cost Reduction) notation that has been us...
SIGSOFT
2001
ACM
14 years 8 months ago
2001
ACM
Scenario-based specifications such as Message Sequence Charts (MSCs) are becoming increasingly popular as part of a requirements specification. Scenarios describe how system compo...