2573 search results - page 435 / 515 » Combinations of Modal Logics |
131
click to vote
DAC
2008
ACM
16 years 5 months ago
2008
ACM
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...
150
click to vote
DAC
2007
ACM
16 years 5 months ago
2007
ACM
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
120
click to vote
DAC
2000
ACM
16 years 5 months ago
2000
ACM
In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of mult...
140
click to vote
DAC
2004
ACM
16 years 5 months ago
2004
ACM
Bounded Model Checking (BMC) relies on solving a sequence of highly correlated Boolean satisfiability (SAT) problems, each of which corresponds to the existence of counter-example...
127
click to vote
DAC
2005
ACM
16 years 5 months ago
2005
ACM
The race conditions often limit the smallest feasible clock period that the optimal clock skew scheduling can achieve. Therefore, the combination of clock skew scheduling and dela...