65 search results - page 6 / 13 » Compact Reduced Order Modeling for Multiple-Port Interconnec... |
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
In this paper we propose a novel parameterized interconnect order reduction algorithm, CORE, to efficiently capture both inter-die and intra-die variations. CORE applies a two-ste...
ICCAD
1995
IEEE
13 years 11 months ago
1995
IEEE
This paper presents a linear time algorithm to reduce a large RC interconnect network into subnetworks which are approximated with lower order equivalent RC circuits. The number o...
DATE
1999
IEEE
14 years 8 hour ago
1999
IEEE
Modern IC design requires accurate analysis and modeling of chip-level interconnect, the substrate and package parasitics. Traditional approaches for such analyses are computation...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
In this paper we describe a flexible and efficient new algorithm for model order reduction of parameterized systems. The method is based on the reformulation of the parametric s...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
Abstract— Frequency dependent interconnect analysis is challenging since lumped equivalent circuit models extracted at different frequencies exhibit distinct time and frequency d...