Sciweavers

20197 search results - page 10 / 4040
» Comparing Computational Power
Sort
View
EUC
2006
Springer
13 years 11 months ago
Co-optimization of Performance and Power in a Superscalar Processor Design
Abstract. As process technology scales down, power wall starts to hinder improvements in processor performance. Performance optimization has to proceed under a power constraint. Th...
Yongxin Zhu, Weng-Fai Wong, Stefan Andrei
ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
14 years 4 months ago
CMOS Comparators for High-Speed and Low-Power Applications
— In this paper, we present two designs for CMOS comparators: one which is targeted for high-speed applications and another for low-power applications. Additionally, we present h...
Eric Menendez, Dumezie Maduike, Rajesh Garg, Sunil...
DM
1999
109views more  DM 1999»
13 years 7 months ago
Hamiltonian powers in threshold and arborescent comparability graphs
We examine powers of Hamiltonian paths and cycles as well as Hamiltonian (power) completion problems in several highly structured graph classes. For threshold graphs we give effic...
Sam Donnelly, Garth Isaak
ISLPED
1995
ACM
95views Hardware» more  ISLPED 1995»
13 years 11 months ago
Reducing the frequency of tag compares for low power I-cache design
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
Ramesh Panwar, David A. Rennels
ISLPED
2003
ACM
95views Hardware» more  ISLPED 2003»
14 years 24 days ago
Power efficient comparators for long arguments in superscalar processors
Traditional pulldown comparators that are used to implement associativeaddressing logic in superscalar microprocessors dissipate energy on a mismatch in any bit position in the co...
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad ...