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» Comparison of Hardware and Software Cache Coherence Schemes
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HPCA
2008
IEEE
14 years 8 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
WSCG
2003
170views more  WSCG 2003»
13 years 9 months ago
Hardware Accelerated Point Rendering of Isosurfaces
Interactive volume sculpting and volume editing often employ surface based visualization techniques, and interactive applications require fast generation and rendering of surface ...
J. Andreas Bærentzen, Niels Jørgen Ch...
CODES
2003
IEEE
14 years 25 days ago
Tracking object life cycle for leakage energy optimization
The focus of this work is on utilizing the state of objects during their lifespan in optimizing the leakage energy consumed in the data caches when executing embedded Java applica...
Guangyu Chen, Narayanan Vijaykrishnan, Mahmut T. K...
MICRO
2003
IEEE
135views Hardware» more  MICRO 2003»
14 years 25 days ago
Generational Cache Management of Code Traces in Dynamic Optimization Systems
A dynamic optimizer is a runtime software system that groups a program’s instruction sequences into traces, optimizes those traces, stores the optimized traces in a softwarebase...
Kim M. Hazelwood, Michael D. Smith
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
14 years 19 days ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...