151 search results - page 30 / 31 » Comparison of Hardware and Software Cache Coherence Schemes |
ASPLOS
2010
ACM
13 years 10 months ago
2010
ACM
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
SIGCOMM
2009
ACM
14 years 2 months ago
2009
ACM
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
IOLTS
2009
IEEE
14 years 2 months ago
2009
IEEE
— The paper deals with designing fault tolerant finite state machines (FSMs) by nanoelectronic programmable logic arrays (PLAs). Two main critical parameters of the fault toleran...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
A traditional fixed-function graphics accelerator has evolved into a programmable general-purpose graphics processing unit over the last few years. These powerful computing cores...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
The trends in enterprise IT toward service-oriented computing, server consolidation, and virtual computing point to a future in which workloads are becoming increasingly diverse i...