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DATE
2005
IEEE
102views Hardware» more  DATE 2005»
14 years 1 months ago
Modeling of a Reconfigurable OFDM IP Block Family For an RF System Simulator
The idea of design domain specific Mother Model of IP block family as a base of modeling of system integration is presented here. A common reconfigurable Mother Model for ten diff...
Hannu Heusala, Jussi Liedes
GLVLSI
2009
IEEE
146views VLSI» more  GLVLSI 2009»
13 years 11 months ago
A reconfigurable stochastic architecture for highly reliable computing
Mounting concerns over variability, defects and noise motivate a new approach for integrated circuits: the design of stochastic logic, that is to say, digital circuitry that opera...
Xin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan...
ERSA
2010
187views Hardware» more  ERSA 2010»
13 years 5 months ago
An Open Source Circuit Library with Benchmarking Facilities
In this paper, we introduce the open-source PivPav backend tool for reconfigurable computing. Essentially, PivPav provides an interface to a library of digital circuits that are ke...
Mariusz Grad, Christian Plessl
FCCM
2006
IEEE
108views VLSI» more  FCCM 2006»
14 years 1 months ago
A Reconfigurable Distributed Computing Fabric Exploiting Multilevel Parallelism
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
Charles L. Cathey, Jason D. Bakos, Duncan A. Buell
ISCA
1999
IEEE
88views Hardware» more  ISCA 1999»
13 years 12 months ago
Performance of Image and Video Processing with General-Purpose Processors and Media ISA Extensions
This paper aims to provide a quantitative understanding of the performance of image and video processing applications on general-purpose processors, without and with media ISA ext...
Parthasarathy Ranganathan, Sarita V. Adve, Norman ...