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HPCA
2009
IEEE
14 years 10 months ago
Bridging the computation gap between programmable processors and hardwired accelerators
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementatio...
Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Sco...
CODES
2007
IEEE
14 years 4 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
CODES
2005
IEEE
14 years 3 months ago
Future wireless convergence platforms
As wireless platforms converge to multimedia systems, architectures must converge to support voice, data, and video applications. From a processor architecture perspective, suppor...
C. John Glossner, Mayan Moudgill, Daniel Iancu, Ga...
PE
2008
Springer
173views Optimization» more  PE 2008»
13 years 9 months ago
Improving fairness in a WRED-based DiffServ network: A fluid-flow approach
The DiffServ architecture has been proposed as a scalable approach for upgrading the Internet, adding service differentiation functionalities. However, several aspects of this arc...
Mario Barbera, Alfio Lombardo, Giovanni Schembra, ...
ITC
2003
IEEE
136views Hardware» more  ITC 2003»
14 years 3 months ago
Adapting JTAG for AC Interconnect Testing
The use of AC coupled interconnects to provide communication paths between devices is increasing. The existing IEEE 1149.1 boundary scan standard [1] (JTAG) has limitations that h...
Lee Whetsel