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» Compiling for Speculative Architectures
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HPCA
2008
IEEE
14 years 2 months ago
Speculative instruction validation for performance-reliability trade-off
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal
HPCA
2003
IEEE
14 years 8 months ago
Power-Aware Control Speculation through Selective Throttling
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
Juan L. Aragón, José González...
MICRO
2009
IEEE
103views Hardware» more  MICRO 2009»
14 years 3 months ago
BulkCompiler: high-performance sequential consistency through cooperative compiler and hardware support
A platform that supported Sequential Consistency (SC) for all codes — not only the well-synchronized ones — would simplify the task of programmers. Recently, several hardware ...
Wonsun Ahn, Shanxiang Qi, M. Nicolaides, Josep Tor...
ICFP
2003
ACM
14 years 8 months ago
Optimistic evaluation: an adaptive evaluation strategy for non-strict programs
Lazy programs are beautiful, but they are slow because they build many thunks. Simple measurements show that most of these thunks are unnecessary: they are in fact always evaluate...
Robert Ennals, Simon L. Peyton Jones
IEEEPACT
2002
IEEE
14 years 1 months ago
Eliminating Exception Constraints of Java Programs for IA-64
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komats...