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» Complementarity of Error Detection Techniques
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DATE
2007
IEEE
79views Hardware» more  DATE 2007»
14 years 2 months ago
Utilization of SECDED for soft error and variation-induced defect tolerance in caches
Combination of SECDED with a redundancy technique can effectively tolerate a high variation-induced defect rate in future processes. However, while a defective cell in a block can...
Luong Dinh Hung, Hidetsugu Irie, Masahiro Goshima,...
DAC
2005
ACM
13 years 9 months ago
Logic soft errors in sub-65nm technologies design and CAD challenges
Logic soft errors are radiation induced transient errors in sequential elements (flip-flops and latches) and combinational logic. Robust enterprise platforms in sub-65nm technolog...
Subhasish Mitra, Tanay Karnik, Norbert Seifert, Mi...
ICIP
2003
IEEE
14 years 9 months ago
Error concealment of video sequences by data hiding
A complete error resilient video transmission codec is presented, utilizing imperceptible embedded information for combined detecting, resynchronization and reconstruction of the ...
Alper Yilmaz, A. Aydin Alatan
DFT
2003
IEEE
117views VLSI» more  DFT 2003»
14 years 28 days ago
Fault Tolerant Design of Combinational and Sequential Logic Based on a Parity Check Code
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
Sobeeh Almukhaizim, Yiorgos Makris
VTS
2003
IEEE
104views Hardware» more  VTS 2003»
14 years 27 days ago
Application of Saluja-Karpovsky Compactors to Test Responses with Many Unknowns
This paper addresses the problem of compacting test responses in the presence of unknowns at the input of the compactor by exploiting the capabilities of well-known error detectio...
Janak H. Patel, Steven S. Lumetta, Sudhakar M. Red...