In many designs, the worst-case-delay path may never be exercised or may be exercised infrequently. For those designs, a strategy of optimizing a circuit for the worst-case condit...
Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgo...
Both technology mapping and circuit clustering have a large impact on FPGA designs in terms of circuit performance, area, and power dissipation. Existing FPGA design flows carry o...
The classic algorithm for optimal buffer insertion due to van Ginneken has time and space complexity O(n2 ), where n is the number of possible buffer positions. We present a new a...
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
A tool that automates the floating-point to fixed-point conversion (FFC) process for digital signal processing systems is described. The tool automatically optimizes fixed-point d...