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» Concurrent Error Detection in S-boxes
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FM
2009
Springer
157views Formal Methods» more  FM 2009»
14 years 2 months ago
Symbolic Predictive Analysis for Concurrent Programs
Abstract. Predictive analysis aims at detecting concurrency errors during runtime by monitoring a concrete execution trace of a concurrent program. In recent years, various models ...
Chao Wang, Sudipta Kundu, Malay K. Ganai, Aarti Gu...
VTS
2005
IEEE
102views Hardware» more  VTS 2005»
14 years 1 months ago
Design of Adaptive Nanometer Digital Systems for Effective Control of Soft Error Tolerance
Nanometer circuits are highly susceptible to soft errors generated by alpha-particle or atmospheric neutron strikes to circuit nodes. The reasons for the high susceptibility are t...
Abdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhij...
ITC
2003
IEEE
141views Hardware» more  ITC 2003»
14 years 24 days ago
Cost-Effective Approach for Reducing Soft Error Failure Rate in Logic Circuits
In this paper, a new paradigm for designing logic circuits with concurrent error detection (CED) is described. The key idea is to exploit the asymmetric soft error susceptibility ...
Kartik Mohanram, Nur A. Touba
ICDE
1999
IEEE
107views Database» more  ICDE 1999»
14 years 8 months ago
Using Codewords to Protect Database Data from a Class of Software Errors
Increasingly, for extensibility and performance, specialpurpose application code is being integrated with database system code. Such application code has direct access to database...
Philip Bohannon, Rajeev Rastogi, S. Seshadri, Abra...
VTS
2005
IEEE
89views Hardware» more  VTS 2005»
14 years 1 months ago
Synthesis of Low Power CED Circuits Based on Parity Codes
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
Shalini Ghosh, Sugato Basu, Nur A. Touba