734 search results - page 59 / 147 » Configurable Transactional Memory |
FPL
2006
Springer
14 years 12 days ago
2006
Springer
In line with Shannon's ideas, we define the entropy of FPGA reconfiguration to be the amount of information needed to configure a given circuit onto a given device. We propos...
DATE
2004
IEEE
14 years 14 days ago
2004
IEEE
This paper presents an environment based on SystemC for architecture specification of programmable systems. Making use of the new architecture description language ArchC, able to ...
MICRO
2000
IEEE
14 years 9 days ago
2000
IEEE
Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper, we propose a cache and TLB layout and design that...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Multi-context FPGAs have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. Large amount of memory causes significant ove...
ISPAN
1999
IEEE
14 years 1 months ago
1999
IEEE
For an effective Internet-based distributed parallel computing platform, Java-Internet Computing Environment (JICE) is designed and implemented with multithreading and remote meth...