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ICCAD
2009
IEEE
136views Hardware» more  ICCAD 2009»
13 years 6 months ago
A hierarchical floating random walk algorithm for fabric-aware 3D capacitance extraction
With the adoption of ultra regular fabric paradigms for controlling design printability at the 22nm node and beyond, there is an emerging need for a layout-driven, pattern-based p...
Tarek A. El-Moselhy, Ibrahim M. Elfadel, Luca Dani...
FPL
2005
Springer
226views Hardware» more  FPL 2005»
14 years 2 months ago
A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC
A parallel MPEG-4 Simple Profile encoder for FPGA based multiprocessor System-on-Chip (SOC) is presented. The goal is a computationally scalable framework independent of platform....
Olli Lehtoranta, Erno Salminen, Ari Kulmala, Marko...
CF
2005
ACM
13 years 10 months ago
Drowsy region-based caches: minimizing both dynamic and static power dissipation
Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal...
Michael J. Geiger, Sally A. McKee, Gary S. Tyson
ICDE
2000
IEEE
111views Database» more  ICDE 2000»
14 years 10 months ago
Dynamic Query Scheduling in Data Integration Systems
Execution plans produced by traditional query optimizers for data integration queries may yield poor performance for several reasons. The cost estimates may be inaccurate, the mem...
C. Mohan, Françoise Fabret, Luc Bouganim, P...
DATE
2006
IEEE
134views Hardware» more  DATE 2006»
14 years 2 months ago
ASIP-based multiprocessor SoC design for simple and double binary turbo decoding
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory a...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...