58 search results - page 10 / 12 » Controlled-Load Limited Switch Dynamic Logic Circuit |
GECCO
2009
Springer
14 years 2 months ago
2009
Springer
VLSI research, in its continuous push toward further miniaturisation, is seeking to break through the limitations of current circuit manufacture techniques by moving towards biomi...
ISMVL
2007
IEEE
14 years 1 months ago
2007
IEEE
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...
DATE
2003
IEEE
14 years 25 days ago
2003
IEEE
In modern SoCs, embedded memories occupy the largest part of the chip area and include an even larger amount of active devices. As memories are designed very tightly to the limits...
FPGA
2001
ACM
14 years 17 hour ago
2001
ACM
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extend...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...