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AES
2005
Springer
137views Cryptology» more  AES 2005»
13 years 7 months ago
Design of a multimedia processor based on metrics computation
Media-processing applications, such as signal processing, 2D and 3D graphics rendering, and image compression, are the dominant workloads in many embedded systems today. The real-...
Nader Ben Amor, Yannick Le Moullec, Jean-Philippe ...
CODES
1998
IEEE
13 years 12 months ago
The construction of a retargetable simulator for an architecture template
Systems in the domain of high-performance video signal processing are becoming more and more programmable. We suggest an approach to design such systems that involves measuring, v...
Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, ...
CODES
2004
IEEE
13 years 11 months ago
Efficient exploration of on-chip bus architectures and memory allocation
Separation between computation and communication in system design allows the system designer to explore the communication architecture independently of component selection and map...
Sungchan Kim, Chaeseok Im, Soonhoi Ha
INFOCOM
2010
IEEE
13 years 6 months ago
Scalable Modulation for Scalable Wireless Videocast
Abstract— In conventional wireless systems with layered architectures, the physical layer treats all data streams from upper layers equally and apply the same modulation and codi...
Lin Cai, Yuanqian Luo, Siyuan Xiang, Jianping Pan
DAC
2004
ACM
14 years 8 months ago
Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding
This paper describes a dynamic voltage and frequency scaling (DVFS) technique for MPEG decoding to reduce the energy consumption using the computational workload decomposition. Th...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram