40 search results - page 3 / 8 » Crosstalk Reduction by Transistor Sizing |
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Power consumption, particularly runtime leakage, in long on-chip buses has grown to an unacceptable portion of the total power budget due to heavy buffer insertion to combat RC de...
DATE
2003
IEEE
14 years 23 days ago
2003
IEEE
Interconnect delay dominates system delay in modern circuits, and with reduced feature sizes, coupling capacitance and signal crosstalk have become significant issues. By spacing...
TCAD
1998
13 years 7 months ago
1998
— Conventional methods for optimal sizing of wires and transistors use linear resistor-capacitor (RC) circuit models and the Elmore delay as a measure of signal delay. If the RC ...
GLVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...
ISQED
2005
IEEE
14 years 1 months ago
2005
IEEE
Leakage power has become one of the most critical design concerns for the system-level chip designer. Multi-threshold techniques have been used to reduce runtime leakage power wit...