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ISQED
2009
IEEE
187views Hardware» more  ISQED 2009»
14 years 2 months ago
An efficient current-based logic cell model for crosstalk delay analysis
 Electrical Modeling for High Bandwidth IO Link  Chirayu Amin, Chandramouli Kashyap ¬ Intel Corp., Hillsboro, OR  Prateek Bhansali ¬ Univ. of Minnesota, Mi...
Debasish Das, William Scott, Shahin Nazarian, Hai ...
DATE
2002
IEEE
102views Hardware» more  DATE 2002»
14 years 18 days ago
Library Compatible Ceff for Gate-Level Timing
Accurate gate-level static timing analysis in the presence of RC loads has become an important problem for modern deep-submicron designs. Non-capacitive loads are usually analyzed...
Bernard N. Sheehan
ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
14 years 4 months ago
Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
Abhishek Singh, Jitin Tharian, Jim Plusquellic
ICCAD
2000
IEEE
132views Hardware» more  ICCAD 2000»
14 years 2 days ago
Frequency Domain Analysis of Switching Noise on Power Supply Network
In this paper, we propose an approach for the analysis of power supply noise in the frequency domain for power/ground (P/G) networks of tree topologies. We model the P/G network a...
Shiyou Zhao, Kaushik Roy, Cheng-Kok Koh
BMCBI
2007
153views more  BMCBI 2007»
13 years 7 months ago
MPHASYS: a mouse phenotype analysis system
Background: Systematic, high-throughput studies of mouse phenotypes have been hampered by the inability to analyze individual animal data from a multitude of sources in an integra...
R. Brent Calder, Rudolf B. Beems, Harry van Steeg,...