213 search results - page 4 / 43 » Data Speculative Multithreaded Architecture |
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
ISCA
2003
IEEE
14 years 1 months ago
2003
IEEE
While removing software bugs consumes vast amounts of human time, hardware support for debugging in modern computers remains rudimentary. Fortunately, we show that mechanisms for ...
ICCD
2000
IEEE
14 years 8 days ago
2000
IEEE
The power consumption of microprocessors is becoming increasingly important in design decisions, not only in mobile processors, but also now in high-performance processors. Power-...
HPCA
1998
IEEE
13 years 11 months ago
1998
IEEE
The counterflow pipeline concept was originated by Sproull et al.[1] to demonstrate the concept of asynchronous circuits. This architecture relies on distributed decision making an...
ICS
1999
Tsinghua U.
14 years 4 days ago
1999
Tsinghua U.
In this paper we present a processor microarchitecture that can simultaneously execute multiple threads and has a clustered design for scalability purposes. A main feature of the ...